View FAN2110_4536386.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
August 2009
FAN2110 -- TinyBuckTM
3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Features
Wide Input Voltage Range: 3V-24V Wide Output Voltage Range: 0.8V to 80% VIN 10A Output Current 1% Reference Accuracy Over Temperature Over 93% Peak Efficiency Programmable Frequency Operation: 200KHz to 600KHz Fully Synchronous Operation with Integrated Schottky Diode on Low-Side MOSFET Boosts Efficiency Internal Bootstrap Diode Power-Good Signal Starts up on Pre-Bias Outputs Accepts Ceramic Capacitors on Output External Compensation for Flexible Design Programmable Current Limit Under-Voltage, Over-Voltage, and Thermal Shutdown Protections Internal Soft-Start 5x6mm, 25-Pin, 3-Pad MLP Package
Description
The FAN2110 TinyBuckTM is a highly efficient, small footprint, constant frequency, 10A integrated synchronous Buck regulator. The FAN2110 contains both synchronous MOSFETs and a controller/driver with optimized interconnects in one package, which enables designers to solve highcurrent requirements in a small area with minimal external components. Integration helps to minimize critical inductances making component layout simpler and more efficient compared to discrete solutions. The FAN2110 provides for external loop compensation, programmable switching frequency, and current limit. These features allow design flexibility and optimization. High frequency operation allows for all ceramic solutions. The summing current mode modulator uses lossless current sensing for current feedback and over-current protection. Voltage feedforward helps operation over a wide input voltage range. Fairchild's advanced BiCMOS power process, combined with low-RDS(ON) internal MOSFETs and a thermally efficient MLP package, provide the ability to dissipate high power in a small package. Output over-voltage, under-voltage, and thermal shutdown protections help protect the device from damage during fault conditions. FAN2110 also prevents pre-biased output discharge during startup in point-ofload applications.
Applications
Servers & Telecom Graphics Cards & Displays Computing Systems Point-of-Load Regulation Set-Top Boxes & Game Consoles
Related Application Notes
AN-8022 -- TinyCalcTM Calculator
Ordering Information
Part Number
FAN2110MPX FAN2110EMPX
Operating Temperature Range
-10C to 85C -40C to 85C
Package
Molded Leadless Package (MLP) 5x6mm Molded Leadless Package (MLP) 5x6mm
Eco Status
Green Green
Packing Method
Tape and Reel Tape and Reel
For Fairchild's definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Application
Figure 1. Typical Application Diagram
Block Diagram
Figure 2. Block Diagram
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 2
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Pin Configuration
Figure 3. MLP 5x6mm Pin Configuration (Bottom View)
Pin Definitions
Pin #
P1, 6-12 P2, 2-5 P3, 21-23 1 13 14 15 16 17 18 19 20 24 25
Name
SW VIN PGND BOOT PGOOD EN VCC AGND ILIM R(T) FB COMP NC RAMP
Description
Switching Node. Junction of high-side and low-side MOSFETs. Power Conversion Input Voltage. Connect to the main input power source. Power Ground. Power return and Q2 source. High-Side Drive BOOT Voltage. Connect through capacitor (CBOOT) to SW. The IC includes an internal synchronous bootstrap diode to recharge the capacitor on this pin to VCC when SW is LOW. Power-Good Flag. An open-drain output that pulls LOW when FB is outside the limits specified in electrical specs. PGOOD does not assert HIGH until the fault latch is enabled. ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the regulator after a latched fault condition. This input has an internal pull-up when the IC is functioning normally. When a latched fault occurs, EN is discharged by a current sink. Input Bias Supply for IC. The IC's logic and analog circuitry are powered from this pin. This pin should be decoupled to AGND through a > 2.2F X5R / X7R capacitor. Analog Ground. The signal ground for the IC. All internal control voltages are referred to this pin. Tie this pin to the ground island/plane through the lowest impedance connection. Current Limit. A resistor (RILIM) from this pin to AGND can be used to program the currentlimit trip threshold lower than the internal default setting. Oscillator Frequency. A resistor (RT) from this pin to AGND sets the PWM switching frequency. Output Voltage Feedback. Connect through a resistor divider to the output voltage. Compensation. Error amplifier output. Connect the external compensation network between this pin and FB. No Connect. This pin is not used. Ramp Amplitude. A resistor (RRAMP) connected from this pin to VIN sets the ramp amplitude and provides voltage feedforward functionality.
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 3
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Parameter
VIN to PGND VCC to AGND BOOT to PGND BOOT to SW SW to PGND All other pins ESD Continuous AGND=PGND
Conditions
Min.
Max.
28 6 35
Unit
V V V V V V V KV
-0.5 -0.5 -5 -0.3 Human Body Model, JEDEC JESD22-A114 Charged Device Model, JEDEC JESD22-C101 2.0 2.5 Transient (t < 20ns, f < 600KHz)
6.0 24.0 30 VCC+0.3
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.
Symbol
VCC VIN TA TJ fSW
Parameter
Bias Voltage Supply Voltage Ambient Temperature Junction Temperature Switching Frequency
Conditions
VCC to AGND VIN to PGND FAN2110MPX FAN2110EMPX
Min.
4.5 3 -10 -40 200
Typ.
5.0
Max.
5.5 24 +85 +85 +125 600
Unit
V V C C C kHz
Thermal Information
Symbol
TSTG TL JC J-PCB PD Storage Temperature Lead Soldering Temperature, 10 Seconds P1 (Q2) Thermal Resistance: Junction-to-Case P2 (Q1) P3 Thermal Resistance: Junction-to-Mounting Surface Power Dissipation, TA=25C
(1) (1)
Parameter
Min.
-65
Typ.
Max.
+150 +300
Unit
C C C/W C/W C/W C/W
4 7 4 35 2.8
W
Note: 1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 35. Actual results are dependent on mounting method and surface related to the design.
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 4
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Electrical Specifications
Electrical specifications are the result of using the circuit shown in Figure 1 with VIN=12V, unless otherwise noted.
Symbol
Power Supplies ICC VCC Current
Parameter
Conditions
SW=Open, VFB=0.7V, VCC=5V, fSW =600KHz Shutdown: EN=0, VCC=5V
Min. Typ. Max.
Unit
8 7 4.1 4.3 300
12 10 4.5
mA A V mV
VUVLO Oscillator fSW tONmin VRAMP tOFFmin Reference VFB
VCC UVLO Threshold
Rising VCC Hysteresis
Frequency Minimum On-Time
(2)
RT=50K to GND RT=24K to GND
255 540
300 600 50
345 660 65
KHz KHz ns V
Ramp Amplitude, Peak-to-Peak Minimum Off-Time
(2)
16VIN, 1.8VOUT, RT=30K, RRAMP=200K
0.53 100 150
ns
Reference Voltage (see Figure 4 for Temperature Coefficient)
FAN2110MPX, 25C FAN2110EMPX, 25C
794 795
800 800
806 805
mV mV
Error Amplifier G GBW VCOMP ISINK ISOURCE IBIAS DC Gain
(2) (2)
80 VCC=5V 12 0.4 VCC=5V, VCOMP=2.2V VCC=5V, VCOMP=1.2V VFB=0.8V, 25C 1.5 0.8 -850
(2)
85 15 3.2 2.2 1.2 -650 -450
dB MHz V mA mA nA
Gain Bandwidth Product Output Voltage
Output Current, Sourcing Output Current, Sinking FB Bias Current
Protection and Shutdown ILIM IILIM TTSD THYS VOVP VUVSD VFLT VFLT_HYS Soft-Start tSS tEN VOUT to Regulation (T0.8) Fault Enable/SSOK (T1.0)
(2)
Current Limit (see Circuit (2) Description) ILIM Current Over-Temperature Shutdown
(2) (2)
RILIM=182 K,, 25C, fSW =500KHz, VOUT=1.5V, RRAMP=243K, (3) 16 Consecutive Clock Cycles VCC=5V, 25C Internal IC Temperature 2 Consecutive Clock Cycles
(3) (3)
12 -11
14 -10 +155 +30
16 -9
A A C C
Over-Temperature Hysteresis Over-Voltage Threshold Under-Voltage Shutdown Fault Discharge Threshold Fault Discharge Hysteresis
110 68
115 73 250 250
121 78
%VOUT %VOUT mV mV
16 Consecutive Clock Cycles Measured at FB Pin
Measured at FB Pin (VFB ~500mV)
fSW =500KHz
5.3 6.7
ms ms
Continued on the following page...
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 5
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Electrical Specifications (Continued)
Electrical specifications are the result of using the circuit shown in Figure 1 with VIN=12V, unless otherwise noted.
Symbol
Control Functions VEN VEN_HYS REN IEN_DISC RFBok VPGTH_LO
Parameter
EN Threshold, Rising EN Hysteresis EN Pull-Up Resistance EN Discharge Current FB OK Drive Resistance VCC=5V VCC=5V VCC=5V
Conditions
Min. Typ. Max.
1.35 250 800 1 800 2.00
Unit
V mV K A
Auto-Restart Mode, VCC=5V FB < VREF, 2 Consecutive Clock (3) Cycles FB > VREF, 2 Consecutive Clock (3) Cycles IOUT < 2mA VPGOOD=5V
-14 +7
-11 +10
-8 %VREF +13.5 0.4 V A
PGOOD LOW Threshold VPGTH_UP VPG_LO IPG_LK PGOOD Output Low PGOOD Leakage Current
0.2
1.0
Notes: 2. Specifications guaranteed by design and characterization; not production tested. 3. Delay times are not tested in production. Guaranteed by design.
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 6
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Characteristics
1.010 1.005 V FB 1.000 0.995 0.990 -50 0 50 Temperature (oC) 100 150
1.20
1.10 I FB 1.00
0.90
0.80 -50 0 50 Temperature (oC) 100 150
Figure 4. Reference Voltage (VFB) vs. Temperature, Normalized
Figure 5. Reference Bias Current (IFB) vs. Temperature, Normalized
1500 1200 900 600 300 0 0 20 40 60 80 100 120 140 RT (K)
1.02
Frequency (KHz)
1.01 Frequency
600KHz
1.00
300KHz
0.99
0.98 -50 0 50 Temperature ( C)
o
100
150
Figure 6. Frequency vs. RT
Figure 7.
Frequency vs. Temperature, Normalized
1.4
1.04
1.2
1.02
RDS
1
Q1 ~0.32%/C Q2 ~0.35%/C
I ILIM
1.00 0.98
0.8
0.96
0.6 -50 0 50 100 150
-50
0
50 Temperature ( C)
o
100
150
Temperature (C)
Figure 8. RDS vs. Temperature, Normalized (VCC=VGS=5V), Figure 1
Figure 9.
ILIM Current (IILIM) vs. Temperature, Normalized
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 7
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Application Circuits FAN2110
Figure 10. Application Circuit: 1.5VOUT, 10A, 500KHz (10V-20VIN)
FAN2110
Figure 11. Application Circuit: 1.5VOUT, 10A, 500KHz (3.3V-5.5VIN)
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 8
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Performance Characteristics
Typical operating characteristics using the circuit in Figure 10. VIN=12V, VCC=5V, TA=25C, unless otherwise specified.
FAN2110_1.5V_500Khz
100
FAN2110_3.3V_500Khz 100
95
95
90 Efficiency (%)
85
Efficiency (%)
90 85 80
VIN = 10V VIN = 12V
80 VIN = 10V 75 VIN = 12V VIN = 16V VIN = 20V 70 0 2 4 6 8 10 Load Curre nt (Am ps)
75 70 0 2 4 6 8
VIN = 16V VIN = 20V
10
Load Current (Amps)
Figure 12.
1.5VOUT Efficiency, 500KHz
Figure 13. 3.3VOUT Efficiency, 500KHz
(4)
FAN2110_1.5V_300Khz
100
FAN2110_3.3V_300Khz
100
95
95
90 Efficiency (%)
85
Efficiency (%)
90 85 80
VIN = 10V
80 VIN = 10V 75 VIN = 12V VIN = 16V VIN = 20V 70 0 2 4 6 8 10 Load Current (Am ps)
75 70
0 2 4 6 8
VIN = 12V VIN = 16V VIN = 20V
10
Load Current (Amps)
Figure 14. 1.5VOUT Efficiency, 300KHz
FAN2110_2.5V_600Khz 100 95 90 85 80 75 70 0 2 4 6 8 10 Load Current (Amps)
Figure 15. 3.3VOUT Efficiency, 300KHz
FAN2110_1.5V_500K(3.3-5.5V) 95 90 Efficiency (%) 85 80 75 70 0 2 4 6 Load Current (Amps) 8
(4)
Efficiency (%)
VIN = 10V VIN = 12V VIN = 16V VIN = 20V
VIN=3.5V VIN=4.5V VIN=5.5V
10
Figure 16. 2.5VOUT Efficiency ,600KHz
(4)
Figure 17. 1.5VOUT Efficiency, 500KHz (VIN=3.3V to 5V), Figure 11
Note: 4. Circuit values for this configuration change in Figure 10.
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 9
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Performance Characteristics (Continued)
Typical operating characteristics using the circuit in Figure 10. VIN=12V, VCC=5V, TA=25C unless otherwise specified.
Peak HS & LS Mosfet Tempr for 1.5V Output (Measured on Demo Board)
80
Package Power Dissipation at various Vout(s) Fsw = 500Khz 3 Power Dissipation (Watts) 2.5 2 1.5 1
Vout = 1.5V
70
Tem peratures(Deg C)
60 50 40 30 VIN=10V_HS 20 10 0 1 2 3 4 5 6 7 8 9 10
Load Current (A)
VIN=10V_LS VIN=20V_HS VIN=20V_LS
0.5 0 0 2 4 6 8
Vout = 1.8V Vout = 3.3V
10
Load Current (Amps)
Figure 18. Peak MOSFET Temperatures, Figure 10
Line Regulation Data 0.02 % Regulation (Compared to Voltage at 12V)
Figure 19.
Device Dissipation Over VOUT vs. Load
Load Regulation
0.05 % Regulation (Compared to Voltage at No load)
0.01 0 5 -0.01 -0.02 -0.03
No Load 1A Load
0 0 -0.05 2 4 6 8 10
10
15
20
25
-0.1
-0.15 -0.2
VIN=10V VIN=20V
-0.04 Input Voltage (Volts)
-0.25 Load Current (Amps)
Figure 20. 1.5VOUT Line Regulation
Peak HS & LS Mosfet Tempr for 3.3V Output (Measured on Demo Board)
100
Figure 21.
1.5VOUT Load Regulation
Safe Operating Area curves for 70 Deg Temperature rise VIN = 20V, Natural Convection
12 10
L oad Cu rren t (Amp s)
80 Temperatures(Deg C)
8 6 4
300K
60
40 VIN=10V_HS 20 VIN=10V_LS VIN=20V_HS VIN=20V_LS 0 1 2 3 4 5 6 7 Load Current (Amps) 8 9 10
2 0 0
500K 600K
2
4
6
8
10
12
14
Output Voltage (Volts)
Figure 22. Peak MOSFET Temperatures, 3.3V Output
(5)
Figure 23. Typical 20VIN Safe Operation Area (SOA), 70C Ambient Temperature, Natural Convection
Note: 5. Circuit values for this configuration change in Figure 10.
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 10
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Typical Performance Characteristics (Continued)
Typical operating characteristics using the circuit in Figure 10. VIN=12V, VCC=5V, TA=25C unless otherwise specified.
VOUT
VOUT
VSW EN
PGOOD
PGOOD
Figure 24. Startup, 10A Load
Figure 25. Startup with 1.0V Pre-Bias on VOUT
VOUT, 50mV/div
VOUT VSW, 10V/Div
EN
PGOOD
Figure 26. Shutdown, 10A Resistive Load
Figure 27.
VOUT Ripple and SW Voltage, 10A Load
VOUT, 200mV/div
IOUT, 5A/Div
IOUT, 5A/Div
EN, 2V/Div
Figure 28. Transient Response, 0-8A Load, 5A / s Slew Rate
Figure 29. Restart on Short Circuit (Fault)
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 11
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Circuit Description
PWM Generation
Refer to Figure 2 for the PWM control mechanism. FAN2110 uses the summing-mode method of control to generate the PWM pulses. An amplified current-sense signal is summed with an internally generated ramp and the combined signal is compared with the output of the error amplifier to generate the pulse width to drive the high-side MOSFET. Sensed current from the previous cycle is used to modulate the output of the summing block. The output of the summing block is also compared against a voltage threshold set by the RLIM resistor to limit the inductor current on a cycle-by-cycle basis. RRAMP resistor helps set the charging current for the internal ramp and provides input voltage feedforward function. The controller facilitates external compensation for enhanced flexibility.
EN 1.35V
2400 CLKs
0.8V
FB
1.0V 0.8V Fault Latch Enable
SS
3200 CLKs
T0.8
4000 CLKs
Initialization
Once VCC exceeds the UVLO threshold and EN is HIGH, the IC checks for a shorted FB pin before releasing the internal soft-start ramp (SS). If the parallel combination of R1 and RBIAS is 1K, the internal SS ramp is not released and the regulator does not start.
T1.0
Figure 31. Soft-Start Timing Diagram VCC UVLO or toggling the EN pin discharges the internal SS and resets the IC. In applications where external EN signal is used, VIN and VCC should be established before the EN signal comes up to prevent skipping the soft-start function.
Enable
FAN2110 has an internal pull-up to the enable (EN) pin so that the IC is enabled once VCC exceeds the UVLO threshold. Connecting a small capacitor across EN and AGND delays the rate of voltage rise on the EN pin. The EN pin also serves for the restart whenever a fault occurs (refer to the Auto-Restart section). If the regulator is enabled externally, the external EN signal should go HIGH only after VCC is established. For applications where such sequencing is required, FAN2110 can be enabled (after the VCC comes up) with external control, as shown in Figure 30.
Startup on Pre-Bias
The regulator does not allow the low-side MOSFET to operate in full synchronous mode until SS reaches 95% of VREF (~0.76V). This enables the regulator to startup on a pre-biased output and ensures that pre-biased outputs are not discharged during the soft-start cycle.
Protections
The converter output is monitored and protected against extreme overload, short-circuit, over-voltage, under-voltage, and over-temperature conditions.
Under-Voltage Shutdown
If voltage on the FB pin remains below the undervoltage threshold for 16 consecutive clock cycles, the fault latch is set and the converter shuts down. This protection is not active until the internal SS ramp reaches 1.0V during soft-start. Figure 30. Enabling with External Control
Over-Voltage Protection
If voltage on the FB pin exceeds 115% of VREF for two consecutive clock cycles, the fault latch is set and shutdown occurs. A shorted high-side MOSFET condition is detected when SW voltage exceeds ~0.7V while the low-side MOSFET is fully enhanced. The fault latch is set immediately upon detection. The OV/UV fault protection circuits above are active all the time, including during soft-start.
Soft-Start
Once internal SS ramp has charged to 0.8V (T0.8), the output voltage is in regulation. Until SS ramp reaches 1.0V (T1.0), the fault latch is inhibited. To avoid skipping the soft-start cycle, it is necessary to apply VIN before VCC reaches its UVLO threshold. Normal sequence for powering up would be VIN VCC EN. Soft-start time is a function of oscillator frequency.
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 12
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Over-Temperature Protection (OTP)
The chip incorporates an over-temperature protection circuit that sets the fault latch when a die temperature of about 150C is reached. The IC restarts when the die temperature falls below 125C.
If auto-restart is not desired, tie the EN pin to the VCC pin or pull it HIGH after VCC comes up with a logic gate to keep the 1A current sink from discharging EN to 1.1V. Figure 32 shows one method to pull up EN to VCC for a latch configuration.
Auto-Restart
After a fault, EN pin is discharged by a 1A current sink to a 1.1V threshold before the internal 800K pull-up is restored. A new soft-start cycle begins when EN charges above 1.35V. Depending on the external circuit, the FAN2110 can be configured to remain latched-off or to automatically restart after a fault.
Table 1. Fault / Restart Configurations
EN Pin
Pull to GND
Controller / Restart State
Figure 32.
Enable Control with Latch Option
OFF (Disabled) No Restart - Latched OFF Pull-up to VCC with 100K (After VCC Comes Up) Open Immediate Restart After Fault New Soft-Start Cycle After: Cap. to GND tDELAY (ms)=3.9 * C(nf) When EN is left open, restart is immediate.
Power-Good (PGOOD) Signal
PGOOD is an open-drain output that asserts LOW when VOUT is out of regulation, as measured at the FB pin. Thresholds are specified in the Electrical Specifications section. PGOOD does not assert HIGH until the fault latch is enabled (T1.0) (see Figure 31).
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 13
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Application Information
Bias Supply
The FAN2110 requires a 5V supply rail to bias the IC and provide gate-drive energy. Connect a 2.2f X5R or X7R decoupling capacitor between VCC and AGND. Since VCC is used to drive the internal MOSFET gates, supply current is frequency and voltage dependent. Approximate VCC current (ICC) is calculated by:
L= VOUT * (1 VO UT ) Vin IL * f
(4)
where f is the oscillator frequency.
Setting the Ramp Resistor Value
RRAMP resistor plays a critical role in the design by providing charging current to the internal ramp capacitor and also serving as a means to provide input voltage feedforward. RRAMP is calculated by the following formula:
R RAMP ( K ) = (31 - 2.05 * IOUT ) * VIN * f * 10 - 6 (VIN - 1.8 ) * VOUT -2
ICC ( mA ) = 4.58 + [(
VCC - 5 + 0.013 ) * (f - 128)] 227
(1)
where frequency (f) is expressed in KHz.
Setting the Output Voltage
The output voltage of the regulator can be set from 0.8V to 80% of VIN by an external resistor divider (R1 and RBIAS in Figure 1). For output voltages >3.3V, output current rating may need to be de-rated depending on the ambient temperature, power dissipated in the package and the PCB layout. (Refer to Thermal Information table on page 4, Figure 22, and Figure 23.) The external resistor divider is calculated using: - 0.8V V 0.8V = OUT + 650nA RBIAS R1 Connect RBIAS between FB and AGND. If R1 is open (see Figure 1), the output voltage is not regulated and a latched fault occurs after the SS is complete (T1.0). If the parallel combination of R1 and RBIAS is 1K, the internal SS ramp is not released and the regulator does not start. (2)
(5)
where frequency (f) is expressed in KHz. For wide input operation, first calculate RRAMP for the minimum and maximum input voltage conditions and use larger of the two values calculated. In all applications, current through the RRAMP pin must be greater than 10A from the equation below for proper operation:
VIN - 1.8 10 A RRAMP + 2
(6)
If the calculated RRAMP values in Equation (5) result in a current less than 10A, use the RRAMP value that satisfies Equation (6). In applications with large Input ripple voltage, the RRAMP resistor should be adequately decoupled from the input voltage to minimize ripple on the ramp pin. For example, see Figure 11.
Setting the Clock Frequency
Oscillator frequency is determined by an external resistor, RT, connected between the RT pin and AGND. Resistance is calculated by:
RT (K ) = (10 6 / f ) - 135 65
Setting the Current Limit
There are two levels of current-limit thresholds. The first level of protection is through an internal default limit set at the factory to limit output current beyond normal usage levels. The second level of protection is set externally at the ILIM pin by connecting a resistor (RILIM) between ILIM and AGND. Current-limit protection is enabled whenever the lower of the two thresholds is reached (see Figure 33). FAN2110 uses its internal lowside MOSFET for current-sensing. The current-limit threshold voltage (VILIM) is compared to a scaled version of voltage drop across the low-side MOSFET sampled at the end of each PWM off-time/cycle. The internal default threshold (with ILIM open) is temperature compensated.
(3)
where RT is in K and frequency (f) is in KHz. The regulator cannot start if RT is left open.
Calculating the Inductor Value
Typically the inductor value is chosen based on ripple current (IL), which is chosen between 10 to 35% of the maximum DC load. Regulator designs that require fast transient response use a higher ripple-current setting, while regulator designs that require higher efficiency keep ripple current on the low side and operate at a lower switching frequency. The inductor value is calculated by the following formula:
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 14
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Figure 33. ILIM Network
Figure 34. Compensation Network
The ILIM pin can source a 10A current that can be used to establish a lower, temperature-dependent, current-limit threshold by connecting an external resistor (RILIM) to AGND. RILIM can be approximated with the equation:
RILIM (K) = 95 + 6.1* IOUT + (VIN - 1.8) * VOUT * 3.33 * 10 (RRAMP + 2) * VIN * f
6
Since the FAN2110 employs summing current-mode architecture, type-2 compensation can be used for many applications. For applications that require wide loop bandwidth and/or use very low-ESR output capacitors, type-3 compensation may be required. RRAMP also provides feedforward compensation for changes in VIN. With a fixed RRAMP value, the modulator gain increases as VIN is reduced, which could make it difficult to compensate the loop. For low-input-voltagerange designs (3V to 8V), RRAMP and the compensation component values will be different compared to designs with VIN between 8V and 24V.
(7)
where: IOUT = VOUT = VIN = RRAMP = f =
Full load current in Amps; Set output voltage; Input voltage; Ramp resistor used in K; and Selected switching frequency in KHz.
Recommended PCB Layout
Good PCB layout and careful attention to temperature rise is essential for reliable operation of the regulator. Four-layer PCB with two-ounce copper on the top and bottom side and thermal vias connecting the layers is recommended. Keep power traces wide and short to minimize losses and ringing. Do not connect AGND to PGND below the IC. Connect the AGND pin to PGND at the output OR to the PGND plane.
After 16 consecutive, pulse-by-pulse, current-limit cycles, the fault latch is set and the regulator shuts down. Cycling VCC or EN restores operation after a normal soft-start cycle (refer to Auto-Restart section). The over-current protection fault latch is active during the soft-start cycle. Use a 1% resistor for RILIM. Always use an external resistor RILIM to set the current limit at the desired level. When RILIM is not connected, the IC's internal default current limit is fairly high. This could lead to operation at high load currents, causing overheating of the regulator. For a given RILIM and RRAMP setting, the current limit point varies slightly in an inverse relationship with respect to input voltage (VIN).
SW
VIN GND GND
Loop Compensation
The loop is compensated using a feedback network around the error amplifier. Figure 34 shows a complete type-3 compensation network. For type-2 compensation, eliminate R3 and C3.
VOUT
Figure 35. Recommended PCB Layout
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 15
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
Physical Dimensions
2X
TOP VIEW
2X
RECOMMENDED LAND PATTERN ALL VALUES TYPICAL EXCEPT WHERE NOTED SIDE VIEW
SEATING PLANE
OPTIONAL LEAD DESIGN (LEADS# 1, 24 & 25 ONLY) SCALE: 1.5X
BOTTOM VIEW
A) DIMENSIONS ARE IN MILLIMETERS. B) DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) DESIGN BASED ON JEDEC MO-220 VARIATION WJHC E) TERMINALS ARE SYMMETRICAL AROUND THE X & Y AXIS EXCEPT WHERE DEPOPULATED. F) DRAWING FILENAME: MKT-MLP25AREV3
Figure 36. 5x6mm Molded Leadless Package (MLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
www.fairchildsemi.com 16
www.fairchildsemi.com
FAN2110 -- TinyBuckTM, 3-24V Input, 10A, High-Efficiency, Integrated Synchronous Buck Regulator
(c) 2008 Fairchild Semiconductor Corporation FAN2110 * Rev. 1.0.2
17

▲Up To Search▲

Price & Availability of FAN2110

	To Download FAN2110 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .